How to enable PCIDriverKit Bus Leader? (and Memory Space enable?)

I am porting a working kernel extension IOKit driver to a DriverKit system extension. Our device is a PCI device accessed through Thunderbolt. The change from IOPCIFamily to PCIDriverKit has some differences in approach, though.

Namely, in IOKit / IOPCIFamily, this was the correct way to become Bus Leader:

mPCIDevice->setBusLeadEnable(true); // setBusMasterEnable(..) deprecated in OS 12.4

but now, PCIDriverKit's IOPCIDevice does not have that function. Instead I am doing the following:

// Set Bus Leader and Memory Space enable
uint16_t commandRegister = 0;
ivars->mPCIDevice->ConfigurationRead16(kIOPCIConfigurationOffsetCommand, &commandRegister);
commandRegister |= (kIOPCICommandBusLead | kIOPCICommandMemorySpace);
ivars->mPCIDevice->ConfigurationWrite16(kIOPCIConfigurationOffsetCommand, commandRegister);

But I am not convinced this is working (I am still experiencing unexpected errors when attempting to DMA from our device, using the same steps that work for the kernel extension).

The only hint I can find in the online documentation is here, which reads:

Note

The endpoint driver is responsible for enabling the Memory Space Enable and Bus Master Enable settings each time it configures the PCI device. When a crash occurs, or when the system unloads your driver, the system disables these features.

...but that does not state directly how to enable bus leader status. What is the "PCIDriverKit approved" way to become bus leader?

Is there a way to verify/confirm that a device is bus leader? (This would be helpful to prove that bus leadership is not the issue for DMA errors, as well as to confirm that bus leadership was granted).

Thanks in advance!

Answered by daniek3 in 810471022

DMA issues were resolved (ordering of hi- and lo-address 32-bit registers was mixed up, resulting in bad addresses).

The steps provided for PCIDriverKit Bus Leader and Memory Space Enable are working properly - the code written above does work.

Accepted Answer

DMA issues were resolved (ordering of hi- and lo-address 32-bit registers was mixed up, resulting in bad addresses).

The steps provided for PCIDriverKit Bus Leader and Memory Space Enable are working properly - the code written above does work.

How to enable PCIDriverKit Bus Leader? (and Memory Space enable?)
 
 
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